IR-Regex

A parallel regular expressions engine for LLVM IR that uses non-deterministic finite automaton (NFA). and LLVM Opcode as Symbol that match inputs in parallel on functions and instructions levels.

This project started with the question, Can't we replace the symbol in the finite automata transation with LLVM Opcode? 🤔

Running on large input file (Around 16k LoC).

#Install and run IR-Regex

• Install:
  • cargo install ir-regex
• Run:
  • ir-regex pattern file_path
    • Example: ir-regex "(add|sub)*" input.ll

#The Regular Language

Symbols

• alloca, load, store
• add, sub, mul, sdiv, udiv, srem, urem
• fadd, fsub, fmul, fdiv, fneg, frem
• shl, ashr, lshr
• icmp, fcmp
• or, and, xor
• call, callbr, invoke
• select, switch, gep, phi
• sext, zext, Trunc, FPTrunc
• inttoaddr, ptrtoint, inttoptr
• br, indirectbr
• resume, return, unreachable

Operators

• Choice: |
• Grouping: (...)
• Repetition: *

Example:

• (add|sub)*
  • Will match a sequence of add or sub instructions.

#License

MIT License

Copyright (c) 2026 Amr Hesham

Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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